RTL to RTL equivalence checking focused on verification
of ARM hardening flows
Come see how SLEC RTL helps you confidently verify sequential optimizations made to an existing RTL design. A major application for SLEC RTL is in ARM "hardening", where engineers are modifying the ARM RTL for lower power or increased performance. SLEC RTL gives the users a way to formally prove that the initial and modified RTL are functionally equivalent. SLEC RTL is based on Calypto's patented Sequential Analysis Technology, allowing for the formal verification of two designs even if they are sequentially different.
This demonstration provides a complete overview of the methodology and shows how SLEC provides concise counterexamples to quickly and productively identify the source of any design differences. This demonstration is suitable for managers, methodology experts and designers in design and verification.