Intel® Xeon Phi™ Coprocessor
Developer Training Event
Baton Rouge, LA

Event Details:

Tuesday, April 1, 2014
Registration Begins: 8:30AM 
Presentation: 9:00AM to 4:00PM 
Lunch will be provided.

Louisiana State University
Digital Media Center Theatre
340 East Parker Street, Baton Rouge, LA 70808
(Corner of East Parker Street and West Lakeshore Drive)

Parking is available in the lot nearest the Digital Media Center building.
Permits are required and can be purchased for $5.00 at the LSU Visitor Center
located at the corner of Highland Road and Dalrymple Drive.

Please complete a very brief pre-training questionnaire at the following URL:
http://www.colfax-intl.com/nd/svy.aspx?rbtr

This one-day training will provide software developers the foundation needed for modernizing their code to take advantage of parallel architectures found in both the Intel® Xeon® processor and the Intel® Xeon Phi™ coprocessor.

The session will cover:

• An overview of parallel programming frameworks and optimization guidelines for multi-core CPUs (Intel® Xeon®) and many-core coprocessors (Intel® Xeon Phi™)
• Discussions about three layers of parallelism: SIMD, Threads, Cluster environment
• Tips for quick porting/development of HPC software applications
• Real-life examples of code and optimization techniques
• Hardware solution and corresponding software implementations, APIs, and framework

Register Now! 

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