When

Tuesday April 22, 2014 from 8:30 AM to 4:00 PM CDT
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Where

Texas Advanced Computing Center 
J.J. Pickle Research Campus
ROC, Building 196
10100 Burnet Road
Austin, TX 78758
 

 
Driving Directions 

Contact

Brad Wheeler 
Plan 365 Inc 
919-534-2215 
bwheeler@plan365inc.com 
 

Intel® Xeon Phi™ Coprocessor
Developer Training Event
Austin, TX

 

Event Details:

Tuesday, April 22, 2014
Registration Begins: 8:30AM 
Presentation: 9:00AM to 4:00PM 
Lunch will be provided.

Texas Advanced Computing Center
J.J. Pickle Research Campus
ROC, Building 196
10100 Burnet Road
Austin, TX 78758

Parking:
Pickle Research Campus is a gated facility. Upon entering the campus, please stop at the guard post to tell the guard that you are a TACC visitor. (We will provide you with a parking pass so it is not necessary to purchase one.) To get to the Research Office Complex (ROC), Building 196, go through the chain link gate to Road A and turn right. ROC is the last building on the right. When you arrive at ROC, you may park in the covered visitor parking area or any open space in front of ROC. Go up the brick pathway to the entrance of the building. TACC is on the right as you enter the double doors. Please check in at the receptionist desk to obtain a visitor parking pass and return it to your car.


Please complete a very brief pre-training questionnaire at the following URL: 
http://www.colfax-intl.com/nd/svy.aspx?raus

This one-day training will provide software developers the foundation needed for modernizing their code to take advantage of parallel architectures found in both the Intel® Xeon® processor and the Intel® Xeon Phi™ coprocessor.

The session will cover:

  • An overview of parallel programming frameworks and optimization guidelines for multi-core CPUs (Intel® Xeon®) and many-core coprocessors (Intel® Xeon Phi™):
  • Discussions about three layers of parallelism: SIMD, Threads, Cluster environment
  • Tips for quick porting/development of HPC software applications
  • Real-life examples of code and optimization techniques
  • Hardware solution and corresponding software implementations, APIs, and framework