Parallel Programming and Optimization with
Intel® Xeon Phi™ Coprocessors
Developer Training Event
Pittsburgh, PA

Event Details: CDT 102

Wednesday, April 29, 2015
Registration Begins: 8:30 AM
Presentation: 9:00 AM to 4:00 PM
Lunch will be provided

University of Pittsburgh
Chevron Science Center
Annex Computer Lab Room 266
219 Parkman Ave
Pittsburgh, PA 15213

Space is limited ... register early!

This one-day labs course features hands-on exercises on the available programming models and best optimization practices for the Intel Xeon Phi coprocessor and Intel Xeon processor, and on the usage of the Intel software development and diagnostic tools.

The session will cover:

• Offload and Native:  "Hello World" to complex; using MPI.
• Performance Analysis:  VTune.
• Case Study:  All aspects of tuning in the N-body calculation.
• Optimization I:  Strip mining for vectorization, parallel reduction.
• Optimization II:  Loop tiling, thread affinity. 

Register Now! Reminder: You must complete CDT 101 before taking CDT 102

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