Parallel Programming and Optimization with
Intel® Xeon Phi™ Coprocessors
Developer Training Event
East Lansing, MI

Event Details: CDT 101

Thursday, June 4, 2015
Registration Begins: 8:30 AM
Presentation: 9:00 AM to 4:00 PM
Lunch will be provided

Michigan State University
Institute for Cyber-Enabled Research
Biomedical & Physical Sciences Building
Room 1440
567 Wilson Road
East Lansing, MI 48824

Parking: Please use the MSU Interactive Map to view the location and visitor parking.

Space is limited ... register early!

This one-day labs course features hands-on exercises on the available programming models and best optimization practices for the Intel Xeon Phi coprocessor and Intel Xeon processor, and on the usage of the Intel software development and diagnostic tools.

 

The session will cover:

• Intel Xeon Phi architecture: purpose, organization, pre-requisites for good performance, future technology
• Programming models: native, offload, heterogeneous clustering
• Parallel frameworks: automatic vectorization, OpenMP, MPI
• Optimization methods: general,  scalar math, vectorization, multithreading, memory access, communication and special topics

Course abstract can be found here. 

Register Now! 

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