Where
Chestnut Residence & Conference Centre89 Chestnut Street
Toronto, ON M5G 1R1
Driving Directions
Parallel Programming and Optimization with
Intel® Xeon Phi™ Coprocessors
Developer Training Event
Toronto, ON, CA
Event Details: CDT 101
Tuesday, May 19, 2015
Registration Begins: 8:30 AM
Presentation: 9:00 AM to 4:00 PM
Lunch will be provided
Chestnut Residence & Conference Centre
St. Patrick's Conference Room
89 Chestnut Street
Toronto, ON M5G 1R1
http://chestnutconferencecentre.utoronto.ca/about-chestnut
Parking: Underground parking available at the conference center. The entrace to the parking garage is located on the North-West corner of the building on the East side of Chestnut Street. Parking fees and other information can be found here.
Space is limited ... register early!
This one-day seminar features presentations on the available programming models and best optimization practices for the Intel Xeon Phi coprocessors, and on the usage of the Intel software development and diagnostic tools. CDT 101 is a pre-requisite for the hands-on labs (CDT 102).
The session will cover:
- Intel Xeon Phi architecture: purpose, organization, pre-requisites for good performance, future technology
- Programming models: native, offload, heterogeneous clustering
- Parallel frameworks: automatic vectorization, OpenMP, MPI
- Optimization methods: general, scalar math, vectorization, multithreading, memory access, communication and special topics