Parallel Programming and Optimization with
Intel® Xeon Phi™ Coprocessors
Developer Training Event
West Lafayette, IN

Event Details: CDT 101

Tuesday, October 6, 2015
Registration Begins: 8:30 AM
Presentation: 9:00 AM to 4:00 PM
Lunch will be provided

Purdue University
Stewart Center Room 202 (STEW 202)
128 Memorial Mall
West Lafayette, IN 47907

Parking:  Available at Grant Street Parking Garage

Space is limited ... register early!

This one-day seminar features presentations on the available programming models and best optimization practices for the Intel Xeon Phi coprocessors, and on the usage of the Intel software development and diagnostic tools.  CDT 101 is a pre-requisite for the hands-on labs (CDT 102).

The session will cover:

• Offload and Native:  "Hello World" to complex, using MPI>
• Performance Analysis:  VTune.
• Case Study:  All aspects of tuning in the N-body calculation.
• Optimization I:  Strip-mining for vectorization, parallel reduction.
• Optimization II:  Loop tiling, thread affinity.

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