Wednesday September 30, 2015 from 8:30 AM to 4:00 PM CDT
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Tulane University 
Lavin-Barnick Center
Rechler Conference Room - Room #202
New Orleans, LA 70118

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Marissa Rogers
Plan 365 Inc. 

Parallel Programming and Optimization with
Intel® Xeon Phi™ Coprocessors
Developer Training Event
New Orleans, LA

Event Details: CDT 101

Wednesday, September 30, 2015
Registration Begins:  8:30 AM
Presentation:  9:00 AM to 4:00 PM
Lunch will be provided

Tulane University
Lavin-Bernick Center
Rechler Conference Room - #202
New Orleans, LA 70118 

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Parking information:  TBD 

Space is limited ... register early!

This one-day seminar features presentations on the available programming models and best optimization practices for the Intel Xeon Phi coprocessors, and on the usage of the Intel software development and diagnostic tools.  CDT 101 is a pre-requisite for the hands-on labs (CDT 102).

  • Offload and Native:  "Hello World" to complex, using MPI>
  • Performance Analysis:  VTune.
  • Case Study:  All aspects of tuning in the N-body calculation.
  • Optimization I:  Strip-mining for vectorization, parallel reduction.
  • Optimization II:  Loop tiling, thread affinity.

Course abstract can be found here. 


Reminder: You must complete CDT 101 before taking CDT 102