Friday, January 29, 2021
8:00 a.m.-10:00 a.m. Pacific Time

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Terry Berke

Si2 Artificial Intelligence/
Machine Learning Winter Workshop



Keynote Speaker

The OECD AI Compute Taskforce:  
Addressing a Critical Policy Gap 
Fueling the Global Compute Divide

Keith Strier
Vice President, Worldwide AI Initiatives

Most countries have by now published national AI strategies, but they cannot answer three questions fundamental to successfully implementing them: 

      How much AI compute do we have?
      How does it compare to other countries?   
      Is it enough? 

One consequence is that government leaders cannot make informed decisions around AI infrastructure investments. A broader concern is that wealthier countries are making outsized investments in AI compute capacity, leading to a global compute divide that will sustain resource inequities in a global digital economy.

The Organisation for Economic Co-operation and Development is a Paris-based intergovernmental economic group with 37 member countries, founded in 1961 to stimulate economic progress and world trade. In early 2020, OCED established the AI Compute Taskforce to develop a framework for measuring and benchmarking domestic AI compute capacity to better inform policymakers in the OECD's 37 member countries. Its output is likely to become a material input to national assessments of AI readiness and digital sovereignty and directly influence national AI infrastructure policy, budgets, and investment priorities.

Keith’s presentation will provide:

  • An overview of the OECD AI Compute Taskforce
  • Its mission and the top-level issues that are evaluated through a multi-stakeholder process involving government, industry, and academia.

About the Speaker

Keith Strier is Vice President, Worldwide AI Initiatives at NVIDIA, with primary responsibility for global public sector portfolio and the AI Nations partnership initiative. Keith advises national and city government leaders on AI policies and infrastructure investments and was recently appointed by the OECD as Co-Chair, AI Compute Taskforce. In this role, Keith will lead the development of a framework to help OECD member countries measure and benchmark domestic AI compute capacity to advance economic growth. 

Before joining NVIDIA, Keith was a Senior Partner at EY Consulting and served as the founding Global AI Practice leader. Prior to EY, he was a Senior Partner at Deloitte Consulting and served as the firm’s first Global Chief Digital Officer, driving the vision and implementation of a digital workplace for 250,000 employees. 

Keith is a frequent keynote speaker at major universities and industry conferences and was a Guest Speaker and Industry Facilitator for Harvard Medical School’s Center for BioMedical Informatics for ten years. Keith has a Bachelor of Science with Honors from Cornell University and a law degree from the NYU School of Law.


Machine Learning in Semiconductor
Manufacturing and Test: 
Fallacies, Pitfalls and Marching Orders

Professor Yiorgos Makris
Electrical and Computer Engineering Department
University of Texas at Dallas

While many ML applications in semiconductor manufacturing and test have been heavily researched over the last two decades, few have seen the light of day in a production environment. Recently, the popularity of contemporary AI methods, such as deep learning, has reignited the enthusiasm and reinvigorated the discussion regarding the potential of statistical and machine learning-based solutions. Opportunities exist for reducing test costs, increasing test quality, improving yield and test floor logistics, and providing guidance to designers and process engineers.

Professor Makris will discuss:

  • Lessons learned during 15 years of interactions between academia and industry developing ML-based semiconductor manufacturing and test solutions
  • Critical challenges encountered in both demonstrating and in transitioning such solutions from research to a production environment  
  • Fallacies regarding the application of traditional or contemporary learning methods
  • Operational challenges and solutions that enable and expedite industrial deployment.

About the Speaker

Yiorgos Makris received the Diploma of Computer Engineering from the University of Patras, Greece, in 1995 and MS and Ph.D. degrees in Computer Engineering from the University of California, San Diego, in 1998 and 2001. After spending a decade on the faculty of Yale University, he joined the University of Texas at Dallas where he is now a Professor of Electrical and Computer Engineering, and co-founder of the NSF Industry-University Cooperative Research Center on Hardware and Embedded System Security. His research focuses on machine learning applications and statistical analysis to develop trusted and reliable integrated circuits and systems, with emphasis on the analog/RF domain.

Professor Makris serves as associate editor of the IEEE Transactions on Computer-Aided Design of Integrated Circuits. His awards include the 2006 Sheffield Distinguished Teaching Award, Best Paper Awards from the 2013 IEEE/ACM Design Automation and Test in Europe conference, and 2020 Faculty Research Award from the Erik Jonsson School of Engineering and Computer Science at UT Dallas.


Si2 AI/ML in EDA Special Interest Group Update:
Accomplishments and 2021 Plans

                           Joydip Das, SIG Chair                 Kerim Kalafala, SIG Co-Chair
                           Senior Engineer                           Senior Technical Staff Member
                           Samsung Austin R&D Center     IBM EDA


Following a successful year which saw the completion of a comprehensive industry interest survey and two white papers, the Si2 AI/ML in EDA Special Interest Group is defining its goals for the New Year. The SIG chair and co-chair will discuss:

2020 Accomplishments

— Conducted a global industry survey and published an analysis paper which identified planned usage and structural gaps for AI/ML in EDA.
— Published a position paper and requirements development of an API for AI/ML in EDA derived data.

2021 Goals

—  Leveraging expertise of industry, national laboratories and members, develop a series of tutorials and application notes for high interest AI/ML in EDA use cases to accelerate the move to production AI/ML for industry groups.
—  Develop requirements for closing common machine learning methodology gaps, for example:
     —  Last-mile optimization for semiconductor design
     —  Common validation and debug processes