Parallel Programming and Optimization with
Intel® Xeon Phi™ Coprocessors
Developer Training Event
Chicago, IL

Event Details: CDT 102

Friday, May 22, 2015
Registration Begins: 8:30 AM
Presentation: 9:00 AM to 4:00 PM
Lunch will be provided

University of Chicago
John Crerar Library
Kathleen A. Zar Room
5730 South Ellis Avenue
Chicago, IL 60637

*Please bring your own laptop to the CDT 102 training, below is a list of the necessary specifications:

• Windows (XP or newer), Mac OS X (10.5 or later), or Linux (something from the 21st century)
• Wired (Ethernet) and wireless (Wi-Fi 802.11g or later) network connectivity
• Web Browser (any)
• On Windows: Putty and Pageant (www.putty.org) and WinSCP (www.winscp.net)
• On Mac OS X and Linux: ssh client
• Optional: on all operating systems, the free software NoMachine (www.nomachine.com). This is only necessary if you are not comfortable programming in Linux in a text terminal over an SSH connection. System requirements and installation instructions for NoMachine can be found here. 

Parking: Visitors can use the 5525 South Ellis Avenue parking structure (C2 on this map)

Directions: The Kathleen A. Zar Room is on the first floor of the John Crerar Library (B4 on the map above).  Please tell the staff at the gate that you are attending the workshop in the Zar room.

Space is limited ... register early!

This one-day labs course features hands-on exercises on the available programming models and best optimization practices for the Intel Xeon Phi coprocessor and Intel Xeon processor, and on the usage of the Intel software development and diagnostic tools.

The session will cover:

• Offload and Native:  "Hello World" to complex; using MPI.
• Performance Analysis:  VTune.
• Case Study:  All aspects of tuning in the N-body calculation.
• Optimization I:  Strip mining for vectorization, parallel reduction.
• Optimization II:  Loop tiling, thread affinity. 

Register Now! Reminder: You must complete CDT 101 before taking CDT 102

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